RISC-V is an open ISA (Instruction Set Architecture) based on RISC architecture. It's originated from UC Berkeley and it's attracting more attention in recent years because of its full open architecture so every developer has opportunities to get involved in application processor design or apply it into different applications, such as IoT, Robotics, ... etc.

Any topic about RISC-V is welcome, here are some topics you might be interested in:

  • Software/Firmware Stack on RISC-V such as operating systems, bootloaders, compilers, tool-chain, etc.
  • Virtualization: QEMU, Spike, Hypervisor, .. etc.
  • Technical document study [e.g, User-Level ISA and Privileged ISA]
  • Available applications based on RISC-V.
  • Development status and market opportunities in the future.

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Hack Week 18

Activity

  • 5 months ago: lyan liked Explore RISC-V
  • 5 months ago: dsterba liked Explore RISC-V
  • 5 months ago: yaoxu joined Explore RISC-V
  • 5 months ago: a_faerber liked Explore RISC-V
  • 5 months ago: mbrugger liked Explore RISC-V
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    Comments

    • clin
      5 months ago by clin | Reply

      Hi,

      Just leave my study note here:

      Topic

      Playing openSUSE on RISCV QEMU 4.0

      link

      https://hackmd.io/IRH_FIHGQwm74B6x7nzPLA?view

    • a_faerber
      5 months ago by a_faerber | Reply

      What is wrong with my openSUSE cross-toolchain that you document using some GitHub one? Please report issues if you find any! Package cross-riscv64-elf-gcc9 should be able to build your u-boot and kernel just fine.

    • clin
      5 months ago by clin | Reply

      Hi Andreas,

      Thank you for the reminder and I have experienced two issues for your cross-toolchain so far:

      • Compiling U-Boot by riscv64-elf-gcc9: Pass
      • Compiling kernel by riscv64-efi-gcc9: Fail
      • Compiling U-Boot by riscv64-suse-linux-gcc9: Fail
      • Compiling kernel by riscv64-suse-linux-gcc9: Pass

      I will report it on Bugzilla.

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