RISC-V is an open ISA (Instruction Set Architecture) based on RISC architecture. It's originated from UC Berkeley and it's attracting more attention in recent years because of its full open architecture so every developer has opportunities to get involved in application processor design or apply it into different applications, such as IoT, Robotics, ... etc.

Any topic about RISC-V is welcome, here are some topics you might be interested in:

  • Software/Firmware Stack on RISC-V such as operating systems, bootloaders, compilers, tool-chain, etc.
  • Virtualization: QEMU, Spike, Hypervisor, .. etc.
  • Technical document study [e.g, User-Level ISA and Privileged ISA]
  • Available applications based on RISC-V.
  • Development status and market opportunities in the future.


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This project is part of:

Hack Week 18


  • 1 day ago: yaoxu joined Explore RISC-V
  • 3 days ago: a_faerber liked Explore RISC-V
  • 6 days ago: mbrugger liked Explore RISC-V
  • 12 days ago: gchen joined Explore RISC-V
  • 14 days ago: clin started Explore RISC-V
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